I’m studying Electrical and Computer Engineering at the University of Toronto, where I enjoy working at the intersection of hardware and software, especially computer architecture and digital design. In summer 2025, I interned as an FPGA engineer at Prof. Roman Genov’s Intelligent Sensory Microsystems Lab (ISML), refining my Verilog skills and dabbling in digital design. I also have experience with teaching, having been a TA for APS100 Orientation to Engineering in fall 2025.
I’ll be joining Marvell Technology as a Digital IC Design Intern for my PEY in May 2026!